1. Field of the Invention
The invention relates to the method for transferring patterns. Specifically, the invnetion is related to the method which effectively prevents the defects induced by damaged photoresist during the pattern transferring process.
2. Description of the Prior Art
In some semiconductor fabrications, N-type transistors and P-type transistors are formed with the following steps in sequence: forms a conductor layer on a substrate, doping numerous impurities into the conductor layer, and patterning the conductor layer. For example, after the conductor layer is formed, both the N-type transistor areas and the P-type transistor are doped immediately. For example, after the conductor layer is formed, only the gate area of one type transistor is doped but the gate area of another type transistor is not doped, such that only some transistors have doped gate conductor layer but other transistors only have undoped gate conductor layer.
Such semiconductor fabrications usually are used to avoid the defects of the following processes, while the gates are formed by the pattern process before the doping process is performed. For example, because both the gates and the substrate are not covered after the pattern process and before the doping process, it is hard to precisely control the doping process to let only the gate conductor layer be doped but both the source and the drain be not doped, especially being hard to precisely control the doping process to let only partial gate conductor layer be doped.
However, such semiconductor fabrications also have the following defects:
Although the N-type transistors and the P-type transistors usually use same material to form their gate conductor layer, the doped density and the doped impurities often are different between them. Hence, because different doped materials usually have different etch details, such as etching rate and prefer etch recipe, even they are formed from the same undoped material, it is hard to precisely form P-type transistors and N-type transistors simultaneously if the doped details of P-type transistors are different than that of N-type transistors. For example, while the gate area of N-type transistors is doped but the gate area of the P-type transistors is not doped, each P-type gate usually is wider than each N-type gate even their patterns have same width in the corresponding photo-mask.
Because the substrate must be covered by an anti-reflection layer, such as a SiON layer, before the exposing process, it is desired to remove the anti-reflection layer after the etching process and then the damages of formed structures, such as formed gates, often are unavoidable. For example, while the phosphoric acid is used to remove the SiON layer, not only the gate conductor layers are etched by the phosphoric acid but also different gate conductor layers with different doped details have different etch damages.
It often is desired to perform a thermal treatment before the patterning process to re-distribute or diffuse the impurities doped into the conductor layer or the substrate through the conductor layer. Clearly, both the fabrication steps and relative cost are increased.
Moreover, because the etch properties of different materials, such as doped polysilicon and undoped polysilicon, usually are different, an optimum etching recipe of one material usually is not effective for another material. Hence, while different parts of a substrate have different doped properties, it is hard to effectively etch the whole conductor layer on the whole substrate. Sometimes it is hard to etch different parts in a chamber simultaneously, sometimes it is impossible to etch different parts at the same time.
Besides, the conductor layer sometimes is not totally smooth, no matter is induced by the existent field oxide before the formation of the conductor layer or is induced by the unavoidable defect(s)of the fabrication of the conductor layer. Hence, the doping result sometimes is not uniform enough. For example, if the conductor layer is thinner on some parts of the substrate, the doping process for forming the doped gate conductor layer may also dope some impurities into these parts. Thus, for any transistor located in these parts, not only the gate conductor layer is doped but also both the source and the drain are doped, which is an unwanted defect.